forgot one
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@ -0,0 +1,721 @@
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;*
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;* Gameboy Hardware definitions
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;*
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;* Based on Jones' hardware.inc
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;* And based on Carsten Sorensen's ideas.
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;*
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;* Rev 1.1 - 15-Jul-97 : Added define check
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;* Rev 1.2 - 18-Jul-97 : Added revision check macro
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;* Rev 1.3 - 19-Jul-97 : Modified for RGBASM V1.05
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;* Rev 1.4 - 27-Jul-97 : Modified for new subroutine prefixes
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;* Rev 1.5 - 15-Aug-97 : Added _HRAM, PAD, CART defines
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;* : and Nintendo Logo
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;* Rev 1.6 - 30-Nov-97 : Added rDIV, rTIMA, rTMA, & rTAC
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;* Rev 1.7 - 31-Jan-98 : Added _SCRN0, _SCRN1
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;* Rev 1.8 - 15-Feb-98 : Added rSB, rSC
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;* Rev 1.9 - 16-Feb-98 : Converted I/O registers to $FFXX format
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;* Rev 2.0 - : Added GBC registers
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;* Rev 2.1 - : Added MBC5 & cart RAM enable/disable defines
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;* Rev 2.2 - : Fixed NR42,NR43, & NR44 equates
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;* Rev 2.3 - : Fixed incorrect _HRAM equate
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; If all of these are already defined, don't do it again.
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IF !DEF(HARDWARE_INC)
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HARDWARE_INC SET 1
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rev_Check_hardware_inc: MACRO
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;NOTE: REVISION NUMBER CHANGES MUST BE ADDED
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;TO SECOND PARAMETER IN FOLLOWING LINE.
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IF \1 > 2.2 ;PUT REVISION NUMBER HERE
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WARN "Version \1 or later of 'hardware.inc' is required."
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ENDC
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ENDM
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_HW EQU $FF00
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_VRAM EQU $8000 ; $8000->$A000
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_SCRN0 EQU $9800 ; $9800->$9BFF
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_SCRN1 EQU $9C00 ; $9C00->$9FFF
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_RAM EQU $C000 ; $C000->$E000
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_OAMRAM EQU $FE00 ; $FE00->$FE9F
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_AUD3WAVERAM EQU $FF30 ; $FF30->$FF3F
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_HRAM EQU $FF80 ; $FF80->$FFFE
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; *** MBC5 Equates ***
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rRAMG EQU $0000 ; $0000->$1fff
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rROMB0 EQU $2000 ; $2000->$2fff
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rROMB1 EQU $3000 ; $3000->$3fff
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rRAMB EQU $4000 ; $4000->$5fff
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; --
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; -- OAM flags
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; --
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OAMF_PRI EQU %10000000 ; Priority
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OAMF_YFLIP EQU %01000000 ; Y flip
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OAMF_XFLIP EQU %00100000 ; X flip
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OAMF_PAL0 EQU %00000000 ; Palette number; 0,1
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OAMF_PAL1 EQU %00010000 ; Palette number; 0,1
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;***************************************************************************
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;*
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;* Custom registers
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;*
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;***************************************************************************
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; --
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; -- P1 ($FF00)
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; -- Register for reading joy pad info. (R/W)
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; --
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rP1 EQU $FF00
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P1F_5 EQU %00100000 ; P15 out port
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P1F_4 EQU %00010000 ; P14 out port
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P1F_3 EQU %00001000 ; P13 in port
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P1F_2 EQU %00000100 ; P12 in port
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P1F_1 EQU %00000010 ; P11 in port
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P1F_0 EQU %00000001 ; P10 in port
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; --
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; -- SB ($FF01)
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; -- Serial Transfer Data (R/W)
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; --
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rSB EQU $FF01
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; --
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; -- SC ($FF02)
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; -- Serial I/O Control (R/W)
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; --
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rSC EQU $FF02
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; --
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; -- DIV ($FF04)
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; -- Divider register (R/W)
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; --
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rDIV EQU $FF04
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; --
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; -- TIMA ($FF05)
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; -- Timer counter (R/W)
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; --
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rTIMA EQU $FF05
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; --
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; -- TMA ($FF06)
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; -- Timer modulo (R/W)
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; --
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rTMA EQU $FF06
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; --
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; -- TAC ($FF07)
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; -- Timer control (R/W)
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; --
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rTAC EQU $FF07
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TACF_START EQU %00000100
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TACF_STOP EQU %00000000
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TACF_4KHZ EQU %00000000
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TACF_16KHZ EQU %00000011
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TACF_65KHZ EQU %00000010
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TACF_262KHZ EQU %00000001
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; --
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; -- IF ($FF0F)
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; -- Interrupt Flag (R/W)
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; --
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rIF EQU $FF0F
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; --
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; -- LCDC ($FF40)
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; -- LCD Control (R/W)
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; --
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rLCDC EQU $FF40
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LCDCF_OFF EQU %00000000 ; LCD Control Operation
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LCDCF_ON EQU %10000000 ; LCD Control Operation
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LCDCF_WIN9800 EQU %00000000 ; Window Tile Map Display Select
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LCDCF_WIN9C00 EQU %01000000 ; Window Tile Map Display Select
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LCDCF_WINOFF EQU %00000000 ; Window Display
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LCDCF_WINON EQU %00100000 ; Window Display
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LCDCF_BG8800 EQU %00000000 ; BG & Window Tile Data Select
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LCDCF_BG8000 EQU %00010000 ; BG & Window Tile Data Select
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LCDCF_BG9800 EQU %00000000 ; BG Tile Map Display Select
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LCDCF_BG9C00 EQU %00001000 ; BG Tile Map Display Select
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LCDCF_OBJ8 EQU %00000000 ; OBJ Construction
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LCDCF_OBJ16 EQU %00000100 ; OBJ Construction
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LCDCF_OBJOFF EQU %00000000 ; OBJ Display
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LCDCF_OBJON EQU %00000010 ; OBJ Display
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LCDCF_BGOFF EQU %00000000 ; BG Display
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LCDCF_BGON EQU %00000001 ; BG Display
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; "Window Character Data Select" follows BG
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; --
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; -- STAT ($FF41)
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; -- LCDC Status (R/W)
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; --
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rSTAT EQU $FF41
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STATF_LYC EQU %01000000 ; LYCEQULY Coincidence (Selectable)
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STATF_MODE10 EQU %00100000 ; Mode 10
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STATF_MODE01 EQU %00010000 ; Mode 01 (V-Blank)
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STATF_MODE00 EQU %00001000 ; Mode 00 (H-Blank)
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STATF_LYCF EQU %00000100 ; Coincidence Flag
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STATF_HB EQU %00000000 ; H-Blank
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STATF_VB EQU %00000001 ; V-Blank
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STATF_OAM EQU %00000010 ; OAM-RAM is used by system
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STATF_LCD EQU %00000011 ; Both OAM and VRAM used by system
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STATF_BUSY EQU %00000010 ; When set, VRAM access is unsafe
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; --
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; -- SCY ($FF42)
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; -- Scroll Y (R/W)
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; --
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rSCY EQU $FF42
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; --
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; -- SCY ($FF43)
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; -- Scroll X (R/W)
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; --
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rSCX EQU $FF43
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; --
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; -- LY ($FF44)
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; -- LCDC Y-Coordinate (R)
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; --
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; -- Values range from 0->153. 144->153 is the VBlank period.
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; --
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rLY EQU $FF44
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; --
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; -- LYC ($FF45)
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; -- LY Compare (R/W)
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; --
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; -- When LYEQUEQULYC, STATF_LYCF will be set in STAT
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; --
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rLYC EQU $FF45
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; --
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; -- DMA ($FF46)
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; -- DMA Transfer and Start Address (W)
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; --
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rDMA EQU $FF46
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; --
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; -- BGP ($FF47)
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; -- BG Palette Data (W)
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; --
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; -- Bit 7-6 - Intensity for %11
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; -- Bit 5-4 - Intensity for %10
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; -- Bit 3-2 - Intensity for %01
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; -- Bit 1-0 - Intensity for %00
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; --
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rBGP EQU $FF47
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; --
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; -- OBP0 ($FF48)
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; -- Object Palette 0 Data (W)
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; --
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; -- See BGP for info
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; --
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rOBP0 EQU $FF48
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; --
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; -- OBP1 ($FF49)
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; -- Object Palette 1 Data (W)
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; --
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; -- See BGP for info
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; --
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rOBP1 EQU $FF49
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; --
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; -- WY ($FF4A)
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; -- Window Y Position (R/W)
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; --
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; -- 0 <EQU WY <EQU 143
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; --
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rWY EQU $FF4A
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; --
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; -- WX ($FF4B)
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; -- Window X Position (R/W)
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; --
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; -- 7 <EQU WX <EQU 166
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; --
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rWX EQU $FF4B
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; --
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; -- KEY 1 ($FF4D)
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; -- Select CPU Speed (R/W)
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; --
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rKEY1 EQU $FF4D
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; --
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; -- VBK ($FF4F)
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; -- Select Video RAM Bank (R/W)
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; --
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rVBK EQU $FF4F
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; --
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; -- HDMA1 ($FF51)
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; -- Horizontal Blanking, General Purpose DMA (W)
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; --
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rHDMA1 EQU $FF51
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; --
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; -- HDMA2 ($FF52)
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; -- Horizontal Blanking, General Purpose DMA (W)
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; --
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rHDMA2 EQU $FF52
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; --
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; -- HDMA3 ($FF53)
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; -- Horizontal Blanking, General Purpose DMA (W)
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; --
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rHDMA3 EQU $FF53
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; --
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; -- HDMA4 ($FF54)
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; -- Horizontal Blanking, General Purpose DMA (W)
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; --
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rHDMA4 EQU $FF54
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; --
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; -- HDMA5 ($FF55)
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; -- Horizontal Blanking, General Purpose DMA (R/W)
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; --
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rHDMA5 EQU $FF55
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; --
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; -- RP ($FF56)
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; -- Infrared Communications Port (R/W)
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; --
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rRP EQU $FF56
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; --
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; -- BCPS ($FF68)
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; -- Background Color Palette Specification (R/W)
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; --
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rBCPS EQU $FF68
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; --
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; -- BCPD ($FF69)
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; -- Background Color Palette Data (R/W)
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; --
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rBCPD EQU $FF69
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; --
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; -- BCPS ($FF6A)
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; -- Object Color Palette Specification (R/W)
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; --
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rOCPS EQU $FF6A
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; --
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; -- BCPD ($FF6B)
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; -- Object Color Palette Data (R/W)
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; --
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rOCPD EQU $FF6B
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; --
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; -- SVBK ($FF4F)
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; -- Select Main RAM Bank (R/W)
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; --
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rSVBK EQU $FF70
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; --
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; -- IE ($FFFF)
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; -- Interrupt Enable (R/W)
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; --
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rIE EQU $FFFF
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IEF_HILO EQU %00010000 ; Transition from High to Low of Pin number P10-P13
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IEF_SERIAL EQU %00001000 ; Serial I/O transfer end
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IEF_TIMER EQU %00000100 ; Timer Overflow
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IEF_LCDC EQU %00000010 ; LCDC (see STAT)
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IEF_VBLANK EQU %00000001 ; V-Blank
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;***************************************************************************
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;*
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;* Sound control registers
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;*
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;***************************************************************************
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; --
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; -- AUDVOL/NR50 ($FF24)
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; -- Channel control / ON-OFF / Volume (R/W)
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; --
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; -- Bit 7 - Vin->SO2 ON/OFF (Vin??)
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; -- Bit 6-4 - SO2 output level (volume) (# 0-7)
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; -- Bit 3 - Vin->SO1 ON/OFF (Vin??)
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; -- Bit 2-0 - SO1 output level (volume) (# 0-7)
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; --
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rNR50 EQU $FF24
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rAUDVOL EQU rNR50
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; --
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; -- AUDTERM/NR51 ($FF25)
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; -- Selection of Sound output terminal (R/W)
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; --
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; -- Bit 7 - Output sound 4 to SO2 terminal
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; -- Bit 6 - Output sound 3 to SO2 terminal
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; -- Bit 5 - Output sound 2 to SO2 terminal
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; -- Bit 4 - Output sound 1 to SO2 terminal
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; -- Bit 3 - Output sound 4 to SO1 terminal
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; -- Bit 2 - Output sound 3 to SO1 terminal
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; -- Bit 1 - Output sound 2 to SO1 terminal
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; -- Bit 0 - Output sound 0 to SO1 terminal
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; --
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rNR51 EQU $FF25
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rAUDTERM EQU rNR51
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; --
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; -- AUDENA/NR52 ($FF26)
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; -- Sound on/off (R/W)
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; --
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; -- Bit 7 - All sound on/off (sets all audio regs to 0!)
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; -- Bit 3 - Sound 4 ON flag (doesn't work!)
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; -- Bit 2 - Sound 3 ON flag (doesn't work!)
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; -- Bit 1 - Sound 2 ON flag (doesn't work!)
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; -- Bit 0 - Sound 1 ON flag (doesn't work!)
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; --
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rNR52 EQU $FF26
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rAUDENA EQU rNR52
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;***************************************************************************
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;*
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;* SoundChannel #1 registers
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;*
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;***************************************************************************
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; --
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; -- AUD1SWEEP/NR10 ($FF10)
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; -- Sweep register (R/W)
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; --
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; -- Bit 6-4 - Sweep Time
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; -- Bit 3 - Sweep Increase/Decrease
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; -- 0: Addition (frequency increases???)
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; -- 1: Subtraction (frequency increases???)
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; -- Bit 2-0 - Number of sweep shift (# 0-7)
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; -- Sweep Time: (n*7.8ms)
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; --
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rNR10 EQU $FF10
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rAUD1SWEEP EQU rNR10
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; --
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; -- AUD1LEN/NR11 ($FF11)
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; -- Sound length/Wave pattern duty (R/W)
|
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; --
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; -- Bit 7-6 - Wave Pattern Duty (00:12.5% 01:25% 10:50% 11:75%)
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; -- Bit 5-0 - Sound length data (# 0-63)
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; --
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||||
rNR11 EQU $FF11
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rAUD1LEN EQU rNR11
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; --
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; -- AUD1ENV/NR12 ($FF12)
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; -- Envelope (R/W)
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; --
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; -- Bit 7-4 - Initial value of envelope
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; -- Bit 3 - Envelope UP/DOWN
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; -- 0: Decrease
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||||
; -- 1: Range of increase
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; -- Bit 2-0 - Number of envelope sweep (# 0-7)
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; --
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rNR12 EQU $FF12
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rAUD1ENV EQU rNR12
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; --
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; -- AUD1LOW/NR13 ($FF13)
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; -- Frequency lo (W)
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; --
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rNR13 EQU $FF13
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rAUD1LOW EQU rNR13
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; --
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; -- AUD1HIGH/NR14 ($FF14)
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; -- Frequency hi (W)
|
||||
; --
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||||
; -- Bit 7 - Initial (when set, sound restarts)
|
||||
; -- Bit 6 - Counter/consecutive selection
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||||
; -- Bit 2-0 - Frequency's higher 3 bits
|
||||
; --
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rNR14 EQU $FF14
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||||
rAUD1HIGH EQU rNR14
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||||
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||||
;***************************************************************************
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||||
;*
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||||
;* SoundChannel #2 registers
|
||||
;*
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||||
;***************************************************************************
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||||
|
||||
; --
|
||||
; -- AUD2LEN/NR21 ($FF16)
|
||||
; -- Sound Length; Wave Pattern Duty (R/W)
|
||||
; --
|
||||
; -- see AUD1LEN for info
|
||||
; --
|
||||
rNR21 EQU $FF16
|
||||
rAUD2LEN EQU rNR21
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||||
|
||||
|
||||
; --
|
||||
; -- AUD2ENV/NR22 ($FF17)
|
||||
; -- Envelope (R/W)
|
||||
; --
|
||||
; -- see AUD1ENV for info
|
||||
; --
|
||||
rNR22 EQU $FF17
|
||||
rAUD2ENV EQU rNR22
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD2LOW/NR23 ($FF18)
|
||||
; -- Frequency lo (W)
|
||||
; --
|
||||
rNR23 EQU $FF18
|
||||
rAUD2LOW EQU rNR23
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD2HIGH/NR24 ($FF19)
|
||||
; -- Frequency hi (W)
|
||||
; --
|
||||
; -- see AUD1HIGH for info
|
||||
; --
|
||||
rNR24 EQU $FF19
|
||||
rAUD2HIGH EQU rNR24
|
||||
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* SoundChannel #3 registers
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
; --
|
||||
; -- AUD3ENA/NR30 ($FF1A)
|
||||
; -- Sound on/off (R/W)
|
||||
; --
|
||||
; -- Bit 7 - Sound ON/OFF (1EQUON,0EQUOFF)
|
||||
; --
|
||||
rNR30 EQU $FF1A
|
||||
rAUD3ENA EQU rNR30
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LEN/NR31 ($FF1B)
|
||||
; -- Sound length (R/W)
|
||||
; --
|
||||
; -- Bit 7-0 - Sound length
|
||||
; --
|
||||
rNR31 EQU $FF1B
|
||||
rAUD3LEN EQU rNR31
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LEVEL/NR32 ($FF1C)
|
||||
; -- Select output level
|
||||
; --
|
||||
; -- Bit 6-5 - Select output level
|
||||
; -- 00: 0/1 (mute)
|
||||
; -- 01: 1/1
|
||||
; -- 10: 1/2
|
||||
; -- 11: 1/4
|
||||
; --
|
||||
rNR32 EQU $FF1C
|
||||
rAUD3LEVEL EQU rNR32
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3LOW/NR33 ($FF1D)
|
||||
; -- Frequency lo (W)
|
||||
; --
|
||||
; -- see AUD1LOW for info
|
||||
; --
|
||||
rNR33 EQU $FF1D
|
||||
rAUD3LOW EQU rNR33
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD3HIGH/NR34 ($FF1E)
|
||||
; -- Frequency hi (W)
|
||||
; --
|
||||
; -- see AUD1HIGH for info
|
||||
; --
|
||||
rNR34 EQU $FF1E
|
||||
rAUD3HIGH EQU rNR34
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4LEN/NR41 ($FF20)
|
||||
; -- Sound length (R/W)
|
||||
; --
|
||||
; -- Bit 5-0 - Sound length data (# 0-63)
|
||||
; --
|
||||
rNR41 EQU $FF20
|
||||
rAUD4LEN EQU rNR41
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4ENV/NR42 ($FF21)
|
||||
; -- Envelope (R/W)
|
||||
; --
|
||||
; -- see AUD1ENV for info
|
||||
; --
|
||||
rNR42 EQU $FF21
|
||||
rAUD4ENV EQU rNR42
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4POLY/NR43 ($FF22)
|
||||
; -- Polynomial counter (R/W)
|
||||
; --
|
||||
; -- Bit 7-4 - Selection of the shift clock frequency of the (scf)
|
||||
; -- polynomial counter (0000-1101)
|
||||
; -- freqEQUdrf*1/2^scf (not sure)
|
||||
; -- Bit 3 - Selection of the polynomial counter's step
|
||||
; -- 0: 15 steps
|
||||
; -- 1: 7 steps
|
||||
; -- Bit 2-0 - Selection of the dividing ratio of frequencies (drf)
|
||||
; -- 000: f/4 001: f/8 010: f/16 011: f/24
|
||||
; -- 100: f/32 101: f/40 110: f/48 111: f/56 (fEQU4.194304 Mhz)
|
||||
; --
|
||||
rNR43 EQU $FF22
|
||||
rAUD4POLY EQU rNR43
|
||||
|
||||
|
||||
; --
|
||||
; -- AUD4GO/NR44 ($FF23)
|
||||
; -- (has wrong name and value (ff30) in Dr.Pan's doc!)
|
||||
; --
|
||||
; -- Bit 7 - Inital
|
||||
; -- Bit 6 - Counter/consecutive selection
|
||||
; --
|
||||
rNR44 EQU $FF23
|
||||
rAUD4GO EQU rNR44 ; silly name!
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Cart related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
CART_ROM EQU 0
|
||||
CART_ROM_MBC1 EQU 1
|
||||
CART_ROM_MBC1_RAM EQU 2
|
||||
CART_ROM_MBC1_RAM_BAT EQU 3
|
||||
CART_ROM_MBC2 EQU 5
|
||||
CART_ROM_MBC2_BAT EQU 6
|
||||
CART_ROM_RAM EQU 8
|
||||
CART_ROM_RAM_BAT EQU 9
|
||||
|
||||
CART_ROM_256K EQU 0
|
||||
CART_ROM_512K EQU 1
|
||||
CART_ROM_1M EQU 2
|
||||
CART_ROM_2M EQU 3
|
||||
CART_ROM_4M EQU 4
|
||||
CART_ROM_8M EQU 5
|
||||
CART_ROM_16M EQU 6
|
||||
|
||||
CART_RAM_NONE EQU 0
|
||||
CART_RAM_16K EQU 1
|
||||
CART_RAM_64K EQU 2
|
||||
CART_RAM_256K EQU 3
|
||||
|
||||
CART_RAM_ENABLE EQU $0a
|
||||
CART_RAM_DISABLE EQU $00
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Keypad related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
PADF_DOWN EQU $80
|
||||
PADF_UP EQU $40
|
||||
PADF_LEFT EQU $20
|
||||
PADF_RIGHT EQU $10
|
||||
PADF_START EQU $08
|
||||
PADF_SELECT EQU $04
|
||||
PADF_B EQU $02
|
||||
PADF_A EQU $01
|
||||
|
||||
PADB_DOWN EQU $7
|
||||
PADB_UP EQU $6
|
||||
PADB_LEFT EQU $5
|
||||
PADB_RIGHT EQU $4
|
||||
PADB_START EQU $3
|
||||
PADB_SELECT EQU $2
|
||||
PADB_B EQU $1
|
||||
PADB_A EQU $0
|
||||
|
||||
;***************************************************************************
|
||||
;*
|
||||
;* Screen related
|
||||
;*
|
||||
;***************************************************************************
|
||||
|
||||
SCRN_X EQU 160 ; Width of screen in pixels
|
||||
SCRN_Y EQU 144 ; Height of screen in pixels
|
||||
SCRN_X_B EQU 20 ; Width of screen in bytes
|
||||
SCRN_Y_B EQU 18 ; Height of screen in bytes
|
||||
|
||||
SCRN_VX EQU 256 ; Virtual width of screen in pixels
|
||||
SCRN_VY EQU 256 ; Virtual height of screen in pixels
|
||||
SCRN_VX_B EQU 32 ; Virtual width of screen in bytes
|
||||
SCRN_VY_B EQU 32 ; Virtual height of screen in bytes
|
||||
|
||||
NINTENDO_LOGO: MACRO
|
||||
;*
|
||||
;* Nintendo scrolling logo
|
||||
;* (Code won't work on a real GameBoy)
|
||||
;* (if next six lines are altered.)
|
||||
DB $CE,$ED,$66,$66,$CC,$0D,$00,$0B,$03,$73,$00,$83,$00,$0C,$00,$0D
|
||||
DB $00,$08,$11,$1F,$88,$89,$00,$0E,$DC,$CC,$6E,$E6,$DD,$DD,$D9,$99
|
||||
DB $BB,$BB,$67,$63,$6E,$0E,$EC,$CC,$DD,$DC,$99,$9F,$BB,$B9,$33,$3E
|
||||
ENDM
|
||||
|
||||
ENDC ;HARDWARE_INC
|
||||
Loading…
Reference in New Issue